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本篇博客主要总结了ADRV9029 Rx接收端链路中各个滤波器的配置。配置不同的滤波器系数以及不同的参数#xff0c;可以对输入的数字信号灵活得做decimation处理#xff0c;decimation信号抽取#xff0c;就是降低信号采样率的过程。
Receiver Signal Path
下图为接收端…前言
本篇博客主要总结了ADRV9029 Rx接收端链路中各个滤波器的配置。配置不同的滤波器系数以及不同的参数可以对输入的数字信号灵活得做decimation处理decimation信号抽取就是降低信号采样率的过程。
Receiver Signal Path
下图为接收端I/Q两路的接收链路对ADRV9029S四路接收Rx1/Rx2/Rx3/Rx4都是一样的 在链路中重要的模块
TIA transimpedance amplifier(跨阻放大器)是一个LPFAD接收端带宽最大到200 MHz每个TIA支持100 MHz pass-band分给I/Q两路。
Decimation stages在TIA之后的一部分decimation可以由DEC5或者FIR2, FIR1和RHB3的组合决定如果由DEC5决定的话就降采5倍如果由FIR2, FIR1和RHB3的组合决定的话可以降采24或者8倍。
DEC55倍降采filter系数固定。Finite Impulse Response Filter (FIR1/FIR2)两倍降采或者bypassfilter系数固定。Receive Half-Band 3 Filter (RHB3)两倍降采filter系数固定。Receive Half-Band 2 Filter (RHB2)两倍降采或者bypassfilter系数固定。Receive Half-Band High Rejection 1 Filter (RHB1 (HR))两倍降采或者bypassfilter系数固定。Receive Half-Band Low Power 1 Filter (RHB1 (LP))两倍降采或者bypassfilter系数固定。Receive PFIR Filter可以配置124倍降采或者bypass并且滤波器系数可以配置可以选择2448或者72 filter taps。并且也可以配置gain为6 dB0 dB-6 dB或者-12 dB。
关于滤波器的配置在API 参考代码里有个对应数据结构体adi_adrv9025_RxProfile_t
/*** \brief Data structure to hold settings for the current Rx specific use case profile*/
typedef struct adi_adrv9025_RxProfile
{adi_adrv9025_RxChannels_e channelType; /*! Channel type described by this profile (Rx/ORx/Loopback) */uint8_t rxFirDecimation; /*! Rx FIR decimation (1,2,4) */uint8_t rxDec5Decimation; /*! Decimation of Dec5 or Dec4 filter (5,4) */uint8_t rhb1Decimation; /*! RX Halfband1 (HB1) decimation. Can be either 1 or 2 */uint8_t rhb1WideBandMode; /*! 1 HB1 is wider, 0 HB1 is narrow, ORx and loopback profiles ignore this field */uint8_t rhb2Decimation; /*! RX Halfband2 (HB2) decimation. Can be either 1 or 2 */uint8_t rhb3Decimation; /*! RX Halfband3 (HB3) decimation. Can be either 1 or 2 */uint8_t rxFir1Decimation; /*! Rx FIR decimation (1,2) */uint8_t rxFir2Decimation; /*! Rx FIR decimation (1,2), ORx and loopback profiles ignore this field */uint32_t rxOutputRate_kHz; /*! Rx Output data rate in kHz */uint32_t rfBandwidth_kHz; /*! Rx RF passband bandwidth for the profile */uint32_t rxBbf3dBCorner_kHz; /*! Rx BBF (TIA) 3dB corner in kHz */uint32_t rxAdcBandWidth_kHz; /*! Rx ADC bandwidth - tunes the bandwidth of the passband and noise transfer functions of the ADC */adi_adrv9025_RxFir_t rxFir; /*! Rx FIR filter structure */adi_adrv9025_RxDdc_e rxDdcMode; /*! Rx DDC mode */adi_adrv9025_RxNcoShifterCfg_t rxNcoShifterCfg; /*! Rx NCO Shift parameters used for ZIF-RIF, CIF-ZIF, ORX only uses band A members */uint8_t tiaPowerMode; /*! 5 options for TIA power reduction modes (range 0-4, where 4 allow ARM to set based on LUT for power saving) */adi_adrv9025_RxDataFormat_t rxDataFormat; /*! Rx Data Format settings structure */int16_t rxAdc[ADI_ADRV9025_RXADC_COEFS]; /*! RxAdc profile for that channel*/
} adi_adrv9025_RxProfile_t;可以参考下图对参数进行配置
IF Conversion中频转换 在接收链路的末端还有一个IF Conversion stage电路可以使用可以最终改变JESD port的信号输入电路由两个并行的通路组成(Band A和Band B)每个通路都可以支持upshiftingdownshifting中频中的上下变频, interpolation and decimation上下采样。根据AD官方文档Note that currently, only the low IF to zero IF conversion mode is supported in a released profile。目前IF conversion应该只支持low IF to zero IF模式同时参考文档也给出了个例子 a conceptual case of a 200 MHz receive bandwidth (IQ rate 245.76 MSPS) profile used to receive a 75 MHz MC-GSM offset from the LO. The center frequency is 52.5 MHz offset from the LO, such that the band occupies from ±15 MHz to ±90 MHz. The channel then uses the IF conversion stage to shift the signal to be centered at about 0 Hz, filter with the half-band filter, and decimate the output by two such that the IQ rate sent over the JESD is 122.88 MSPS.
关于IF Conversion电路中一些基本参数可以由adi_adrv9025_RxProfile_t中的参数rxDdcMode进行配置它是个枚举类型
